View GS2993_8395027.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

1 of 23 propietary & confidential GS2993 dual output adaptive cable equalizer data sheet 53966 - 4 august 2012 dual output adaptive cable equalizer GS2993 www.semtech.com key features ? smpte 424m, smpte 292m and smpte 259m compliant ? automatic cable equalization ? multi-standard operation from 143mb/s to 2.97gb/s ?performance opti mized for 270mb/s, 1.485gb/s and 2.97gb/s. typical equalize d length of belden 1694a cable: ? 140m at 2.97gb/s ? 220m at 1.485gb/s ? 400m at 270mb/s ? supports dvb-asi at 270mb/s ? dual, independently-controlled outputs ? manual bypass (useful for low data rates with slow rise/fall times) ? programmable carrier detect with squelch threshold adjustment ? automatic power-down on loss of signal ? standby power <30mw (typical) ? differential outputs support dc coupling to 1.2v, 2.5v or 3.3v cml logic ? 0/6 db gain boost selection pin ? cable length indicator output; varies monotonically with input cable length ? selectable de-emphasis: 2db, 4db and 6db ? standard eia/jedec logic control and status signal levels ? single 3.3v power supply operation ? 207mw power consumption (typical) ? wide operating temperature range of -40oc to +85oc ? small footprint qfn package (4mm x 4mm) ? pb-free and rohs compliant applications ? smpte 424m, smpte 292m and smpte 259m coaxial cable serial digital interfaces description the GS2993 is a high-speed bicmos integrated circuit designed to equalize and restore signals received over 75 coaxial cable. the device is designed to support smpte 424m, smpte292m and smpte 259m , and is optimized for performance at 270mb/s, 1.485gb/s and 2.97gb/s. the GS2993 features dc restoration to compensate for the dc content of smpte pathological test patterns. the carrier detect output pin (cd ) indicates whether a valid input signal has been detected. it can be connected directly to the sleep pin to enable automatic power-down upon loss of carrier. a voltage programmable threshold, which can be changed via the sq_adj pin, forces cd high when the input signal amplitude falls below the threshold. this allows the GS2993 to distinguish between low-amplitude sdi signals and noise at the input of the device. the equalizing and dc restore stages are disengaged when the bypass pin is high. no equalization occurs in bypass mode. the GS2993 includes a gain selection pin (gain_sel) which, when tied high, compensates for 6db flat attenuation. the differential outputs can be dc-coupled to gennum 3.3v cable drivers and reclockers, and to industry-standard 1.2v, 2.5v, and 3.3v cml logic by connecting the respective vcco to 1.2v, 2.5v or 3.3v. the GS2993 also includes prog rammable de-emphasis with three operating levels in order to support long pcb traces. the device is available in a 24-pin, 4mm x 4mm qfn package. power consumption of the GS2993 is typically 207mw. the GS2993 is pb-free, and the encapsulation compound does not contain halogenated flame retardant. this component and all homogeneous subcomponents are rohs compliant.
GS2993 dual output adaptive cable equalizer data sheet 53966 - 4 august 2012 2 of 23 propietary & confidential GS2993 functional block diagram revision history version ecr pcn date changes and/or modifications 4 158394 C august 2012 updates in GS2993 pin descriptions , table 2-1: dc electrical characteristics , and input/output circuits . 3 157634 C february 2012 added pull-down resistor to figure 3-5 . updated the descriptions for the bypass and sleep pins in table 1-1 . clarification to column headings in table 4-1 . 2 157164 C november 2011 updated the descriptions for the gain_sel and sq_adj pins in table 1-1 to indicate that they have internal pull-down resistors. 1 155124 C october 2010 converted to data sheet. increased cable length to 220m at 1.485gb/s. revised cli output voltage range in table 2-1: dc electrical characteristics . 0 154343 C june 2010 converted to preliminary data sheet. changes to the power consumption numbers in table 2-1: dc electrical characteristics and the jitter numbers in table 2-2: ac electrical characteristics . added figure 4-2: cable length indicator output . b 153758 C march 2010 removed the 470nf capacitor (between agc and gnd) from figure 5-1: GS2993 typical application circuit . a 153234 C january 2010 new document. equalizer output 1 a gc s di s leep s do1 bypa ss c d s di s do1 a gc a gc op1_en s q_ad j s quel c h a d just c arrier dete c t mute d c restore output 2 s do2 s do2 op2_en vee_o1 vee_o2 op_ c tl2 op_ c tl1 v cc _o1 v cc _o2 c li v cc _a vee_a g ain_ s el
GS2993 dual output adaptive cable equalizer data sheet 53966 - 4 august 2012 3 of 23 propietary & confidential contents 1. pin out..................................................................................................................... ..........................................4 1.1 GS2993 pin assignment ..................................................................................................... ............4 1.2 GS2993 pin descriptions ................................................................................................... .............4 2. electrical characteristics .................................................................................................. ..........................7 2.1 absolute maximum ratings .................................................................................................. ........7 2.2 dc electrical characteristics ...... ....................................................................................... ...........7 2.3 ac electrical characterist ics ............................................................................................. ...........9 3. input/output circuits ....................................................................................................... ........................ 11 4. detailed description........................................................................................................ .......................... 13 4.1 serial data inputs ........................................................................................................ .................. 13 4.2 cable equalization ........................................................................................................ ................ 13 4.3 serial digital outputs .................................................................................................... ............... 13 4.4 programmable squelch adjust (sq_adj) .............................................................................. 14 4.5 carrier detect, sleep, and auto-sleep .................................................................................... 1 5 4.6 gain_sel .................................................................................................................. ....................... 16 4.7 adjustable output swing, de-emphasis and mute ............................................................ 16 4.8 cable length indicator (cli) .............................................................................................. ........ 17 5. application information ..................................................................................................... ..................... 18 5.1 high gain adaptive cable equalizers .................................................................................... 18 5.2 pcb layout ................................................................................................................ ....................... 18 5.3 typical application circuit ............................................................................................... ......... 19 6. package & ordering information .............................................................................................. ............ 20 6.1 package dimensions ........................................................................................................ ............. 20 6.2 packaging data ............................................................................................................ ................... 20 6.3 recommended pcb footprint .. ........... ........... ........... ........... ........... ........... ........... ........... ....... .. 21 6.4 marking diagram ........................................................................................................... ................ 21 6.5 solder reflow profiles .................................................................................................... .............. 22 6.6 ordering information ...................................................................................................... ............. 22
GS2993 dual output adaptive cable equalizer data sheet 53966 - 4 august 2012 4 of 23 propietary & confidential 1. pin out 1.1 GS2993 pin assignment figure 1-1: GS2993 pin out 1.2 GS2993 pin descriptions g roun d pa d ( b ottom of pa c ka g e) gs 2993 24-pin qfn (top view) s q_ad j a gc c li s leep v cc _a bypa ss a gc 5 6 78 1 6 15 14 13 g ain_ s el vee_a s di 1 2 3 4 s di vee_02 s do1 op1_ c tl 12 11 10 9 c d v cc _02 op2_ c tl v cc _01 17 18 19 20 21 22 23 24 op2_en s do2 vee_01 op1_en s do1 s do2 table 1-1: GS2993 pin descriptions pin number name timing ty p e description 1 vcc_a analog power most positive power supply connection for the input buffer, core and control circuits of the device. connect to +3.3v dc. 2 vee_a analog power most negative power supply connection for the input buffer, core and control circuits. connect to gnd. 3, 4 sdi, sdi analog input serial digital differential input. 5gain_selnot synchronous input input sensitivity control. when low, the sensitivity is 800mv. when high, the sensitivity is 400mv. includes an internal pull-down resistor. 6, 7 agc, agc analog C external agc capacitor. connect pin 5 and pin 6 together as shown in the typical application circuit on page 19 .
GS2993 dual output adaptive cable equalizer data sheet 53966 - 4 august 2012 5 of 23 propietary & confidential 8bypassnot synchronous input core bypass control signal input. forces the e q ualizing and dc restore sta ges into bypass mode when high. no e q ualization occurs in this mode. includes an internal pull-down resistor. 9 sq_adj analog input s q uelch threshold adjust. adjusts the input signal amplitude threshold of the carrier detect function. the output can be muted when the input signal amplitude is too low by connecting the cd and op_ctl pins together through some external co mponents. in this case, when cd is low (0v), op1_ctl and/or o p2_ctl are forced low (0v), and when cd is high (2.5v), op1_ctl and/or op2_ctl are forced high (3.3v). the input level at which th e part is muted can be set through the sq_adj pin through suitable voltage variances as described in section 4.4 . note: when the sq_adj functionality is used and/or in auto_mute, the auto sleep feature is not allowed, and the sleep pin should be left open. includes an internal pull-down resistor. 10 op2_en input output 2 enable. when high, output 2 is operational. when low, output 2 is powered-down and the outputs are both at vcc_o2. includes an internal pull down resistor. 11 op2_ctl not synchronous input control signal input controls the output swing, de-emphasis, and mute features of sdo and sdo from output 2. when connected to gnd, the ou tput swing is 800mv with no de-emphasis. when connected to the 3.3v analog power supply, the output is muted. includes an internal pull down resistor. see section 4.7 for all other control options. 12 vcc_02 analog power most positive power supp ly connection for the output buffer for output 2. connect to 1.2 C 3.3v. 13, 14 sdo2 , sdo2 analog output e q ualized serial digital differential output 2. 15 vee_02 analog power most negative power supply connection for the output buffer for output 2. connect to gnd. 16 vee_01 analog power most negative power supply connection for the output buffer for output 1. connect to gnd. 17, 18 sdo1 , sdo1 analog output e q ualized serial digital differential output. 19 vcc_01 analog power most positive power supp ly connection for the output buffer for output 1. connect to 1.2 C 3.3v. table 1-1: GS2993 pin descriptions (continued) pin number name timing ty p e description
GS2993 dual output adaptive cable equalizer data sheet 53966 - 4 august 2012 6 of 23 propietary & confidential 20 op1_ctl input control signal input controls the output swing, de-emphasis, and mute features of sdo and sdo from output 1. when connected to gnd, the ou tput swing is 800mv with no de-emphasis. when connected to the 3.3v analog power supply, the output is muted. includes an internal pull down resistor. see section 4.7 for all other control options. 21 op1_en input output 1 enable. when high, output 1 is operational. when low, output 1 is powered-down and the outputs are both at vcc_o1. includes an intern al pull up resistor. 22 cli output cable length indicator. 23 sleep not synchronous input control signal input when set high, the GS2993 is powered-down except for the carrier detect functionality. includes an internal pull-down resistor. 24 cd not synchronous output carrier detect status signal output. signal levels are lvcmos/lvttl compatible. indicates presence of a good input signal. when the cd pin is low, a good input signal has been detected. when this pin is high, the input signal is invalid. this pin will indicate loss of carrier for all supported data rates. C center pad C power internally bonded to vee_a. table 1-1: GS2993 pin descriptions (continued) pin number name timing ty p e description
GS2993 dual output adaptive cable equalizer data sheet 53966 - 4 august 2012 7 of 23 propietary & confidential 2. electrical characteristics 2.1 absolute maximum ratings 2.2 dc electrical characteristics parameter value supply voltage - core -0.5v to +3.6v dc supply voltage - output driver -0.5v to +3.6v dc input esd voltage (hbm) 5kv storage temperature range -50c < t s < 125c input voltage range (any input) -0.3 to (v cc_a +0.3)v operating temperature range -40c to +85c solder reflow temperature 260c table 2-1: dc electrical characteristics v cc_a = 3.3v 5%, t a = -40c to +85c, unless otherwise shown parameter symbol conditions min ty p max units notes supply voltage - core v cc_a C 3.135 3.3 3.465 v C supply voltage - output driver v cc _01 & v cc _02 C 1.14 1.2 1.26 v 1 C 2.375 2.5 2.625 v 1 C 3.135 3.3 3.465 v 1 power consumption p d t a = 25c, v cc_ 01 = 1.2v, v cc_ 02 = off output swing = 400mv C165Cmw 2 t a = 25c, v cc_ 01 = 1.2v, v cc_ 02 = 1.2v output swing = 400mv C207Cmw 2 t a = 25c, v cc_ 01 = 1.2v, v cc_ 02 = 1.2v output swing = 800mv C226Cmw 2
GS2993 dual output adaptive cable equalizer data sheet 53966 - 4 august 2012 8 of 23 propietary & confidential power consumption p d t a = 25c, v cc_ 01 = 3.3v, v cc_ 02 = off output swing = 400mv C184Cmw 2 t a = 25c, v cc_ 01 = 3.3v, v cc_ 02 = off output swing = 800mv C215Cmw 2 t a = 25c, v cc_ 01 = 3.3v, v cc_ 02 = 3.3v output swing = 400mv C 241 C mw 2 t a = 25c, v cc_ 01 = 3.3v, v cc_ 02 = 3.3v output swing = 800mv C303Cmw 2 supply current - core i s t a = 25c both outputs on C 57.3 C ma 3 supply current - output driver (for each output) i output driver t a = 25c, v cc_ 01 & v cc_ 02 = 3.3v , v sdo = 800mv C 17.3 C ma C supply current - output driver (for each output) i output driver t a = 25c, v cc_ 01 & v cc_ 02 = 3.3v , v sdo = 400mv C8.9CmaC input common mode voltage v cmin t a = 25c C 1.8 C v C sq_adj dc voltage (to mute signal) C 0m, t a = 25c C3.2CvC sq_adj range C t a = 25c C 0.9 C v C cli output voltage range (referenced to v cc_a ) C t a = 25c C 0.6 to 2.0 C v C cd output voltage v cd (oh) carrier not present 2.0 C C v C v cd (ol) carrier present C C 0.4 v C sleep, gain_sel, bypass, op1_en, op2_en input high level voltage v ih C1.7CCv 4 table 2-1: dc electrical characteristics (continued) v cc_a = 3.3v 5%, t a = -40c to +85c, unless otherwise shown parameter symbol conditions min ty p max units notes
GS2993 dual output adaptive cable equalizer data sheet 53966 - 4 august 2012 9 of 23 propietary & confidential 2.3 ac electrical characteristics sleep, gain_sel, bypass, op1_en, op2_en input low level voltage v il CCC0.7v 4 notes: 1. vcc_o operates from 1.2v through 3.3v (+/-5%). 2. de-emphasis off. 3. an additional 6ma when de-empha sis is enabled (d ual-output mode). 4. digital pins are 2.5v , but 3.3v tolerant. table 2-1: dc electrical characteristics (continued) v cc_a = 3.3v 5%, t a = -40c to +85c, unless otherwise shown parameter symbol conditions min ty p max units notes table 2-2: ac electrical characteristics v cc_a = 3.3v 5%, t a = -40c to +85c, unless otherwise shown parameter symbol conditions min ty p max units notes serial input data rate dr sdo C 143 C 2970 mb/s C input voltage swing v sdi t a =25c, differential, 270mb/s and 1.485gb/s 720 800 950 mv p-p 1 t a =25c, differential, 2.97gb/s 720 800 880 mv p-p 1 output voltage swing v sdo 100 load, t a =25c, differential, op_ctl set for high swing C 800 C mv p-p 2 100 load, t a =25c, differential, op_ctl set for low swing C 400 C mv p-p 2 output jitter of various cable lengths and data rates C 2.97gb/s belden 1694a: 0-120m sdo1 only C C 0.25 ui 3 , 6 C 2.97gb/s belden 1694a: 0-120m sdo1 and sdo2 enabled CC0.3ui 3 , 6 C 2.97gb/s belden 1694a: 120-140m C0.3C ui 4 , 6 C 1.485gb/s belden 1694a: 0-180m C C 0.25 ui 3 , 6 C 1.485gb/s belden 1694a: 180-220m C0.25C ui 4 , 6 C 270mb/s belden 1694a: 0-400m CC0.2ui 3 , 6
GS2993 dual output adaptive cable equalizer data sheet 53966 - 4 august 2012 10 of 23 propietary & confidential output rise/fall time C 2.97gb/s & 1.485gb/s 20% - 80% C75CpsC C 270mb/s C 150 C ps C mismatch in rise/fall time C C C C 30 ps C duty cycle distortion C 3g/hd C C 30 ps C sd C C 55 ps C overshoot C C C C 10 % C input return loss C C 15 21 C db 5 input resistance C single-ended C 1.9 C k C input capacitance C single-ended C 1.3 C pf C output resistance C single-ended C 50 C C notes: 1. 0m cable length. 2. op_ctl refers to either op1_ctl or op2_ctl 3. all parts are production tested. in order to guarant ee jitter over the full ra nge of specification (v cc_a , v cc_01 & v cc_02 = 3.3v 5%, t a = -40c to +85c, and 720-880mv launch swing from the sdi cable driver) the recommended applicat ions circuit must be used. 4. based on characterization da ta using the recommended appl ications circuit, at v cc_a , v cc_01 & v cc_02 = 3.3v, t a = 25c and 800mv launch swing from the sdi cable driver. 5. tested on a GS2993 board from 5mhz to 3ghz. 6. gain_sel = 0. table 2-2: ac electrical characteristics (continued) v cc_a = 3.3v 5%, t a = -40c to +85c, unless otherwise shown parameter symbol conditions min ty p max units notes
GS2993 dual output adaptive cable equalizer data sheet 53966 - 4 august 2012 11 of 23 propietary & confidential 3. input/output circuits figure 3-1: input e q uivalent circuit figure 3-2: sq_adj e q uivalent circuit 4k 5.25k 4k 5.25k r c s di s di s q_ad j 82.4k + - figure 3-3: output circuit figure 3-4: op1_en circuit figure 3-5: sleep, op2_en, bypass, and gain_sel circuit figure 3-6: cd circuit 50 50 s do s do op1_en 100k s leep, op2_en bypa ss , g ain_ s el 100k c d
GS2993 dual output adaptive cable equalizer data sheet 53966 - 4 august 2012 12 of 23 propietary & confidential figure 3-7: op1_ctl figure 3-8: op2_ctl v cc internal referen c e internal referen c e op1_ c tl 1m cc internal referen c e internal referen c e op2_ c tl 100k
GS2993 dual output adaptive cable equalizer data sheet 53966 - 4 august 2012 13 of 23 propietary & confidential 4. detailed description the GS2993 is a high-speed bicmos ic designed to equalize serial digital signals.the GS2993 can equalize 3gb/s, hd and sd serial digital signals, and wi ll typically equalize 140m of belden 1694a cable at 2.97gb/s, 220m at 1. 485gb/ s and 400m at 270mb/s. the GS2993 can be powered from a single +3.3v power supply. when using 1.2v cml, the GS2993 typically cons umes approximately 200mw of po wer. the GS2993 features dual independently controlled outputs, and can be operated from a single +3.3v power supply. 4.1 serial data inputs the serial data signal can be connected to the input pins (sdi/sdi ) in either a differential or single-ended configuration. ac-coupling of the inputs is recommended, as the sdi and sdi inputs are internally biased at approximately 1.8v. 4.2 cable equalization the input signal passes through a variable gain equalizing stage, whose frequency response closely matches the inverse of the cable loss characteristic. in addition, the variation of the frequency response with control voltage imitates the variation of the inverse cable loss characteristic with cable length. the edge energy of the equalized signal is monitored by a detector circuit which produces an error signal corresponding to the difference between the desired edge energy and the actual edge energy. this error signal is integrated by both an internal and an external agc filter capacitor providing a st eady control voltage fo r the gain stage. as the frequency response of the gain stage is automatically varied by the application of negative feedback, the edge energy of the equalized signal is kept at a constant level which is representative of the original edge energy at the transmitter. the equalized signal is also dc-restored, effectively restoring the logic threshold of the equalized signal to its correct level independent of shifts due to ac-coupling. 4.3 serial digital outputs the GS2993 features dual indepe ndently controlled outputs. the digital output signals have a nominal voltage of either 800mvp-p or 400mvp-p, as set by the op1_ctl pin for sdo1 and op2_ctl pin for sdo2. table 4-1 below shows the typical output voltag e levels across different common mode voltages and swing values. table 4-1: typical output voltage levels supply voltage - output driver 400mv p-p swing (dc-coupled output) 400mv p-p swing (ac-coupled output) 800mv p-p swing (dc-coupled output) 800mv p-p swing (ac-coupled output) 3.3v 3.2v 3.1v 3.1v 2.9v 2.5v 2.4v 2.3v 2.3v 2.1v
GS2993 dual output adaptive cable equalizer data sheet 53966 - 4 august 2012 14 of 23 propietary & confidential 4.4 programmable sque lch adjust (sq_adj) the GS2993 incorporates a programmable squelch adjust (sq_adj) threshold. this feature can be useful in applications where there are multiple input channels using the GS2993 and the maximum gain can be limited to avoid crosstalk. the sq_adj pin acts to change the threshold of the carrier detect (cd ) pin, through voltage level variances. when the input sign al drops below a certain threshold, the cd pin will be driven high, indicating that there is not a valid input signal. in applications where programmable squelch adjust is not required, the sq_adj pin may be left unconnected. figure 4-1 shows the relationship between the sq_adj voltage and cable length at which cd will assert or de-assert. this feature has been designed for use in a pplications such as routers, where signal crosstalk and circuit noise cause the equalizer to output erroneous data when no input signal is present. the use of a carrier detect function with a fixed internal reference does not solve this problem, since the signal to noise ratio on the circuit board could be significantly less than the default signal detection level set by the on chip reference. note: sq_adj is designed to operate when the device is in manual sleep mode. in this situation, cd should not be connected to sleep. figure 4-1: sq_adj vs. cable length (vcc=3.3v, room temperature, 800mv launch swing) 4.5 carrier detect, sl eep, and auto-sleep the GS2993 includes a sleep inpu t pin, which allows the appl ication interface to put the GS2993 into a low-power sleep mode, consuming less than 30mw. set the sleep pin high to place the chip in its sleep state. in this mode, the carrier detect output will still function in order to detect valid serial digital input. 1.8v 1.7v 1.6v 1.6v 1.4v 1.2v 1.1v 1v 1v 0.8v table 4-1: typical output voltage levels supply voltage - output driver 400mv p-p swing (dc-coupled output) 400mv p-p swing (ac-coupled output) 800mv p-p swing (dc-coupled output) 800mv p-p swing (ac-coupled output) s q_ad j (v) 3.2 3.0 2.8 2. 6 2.4 2.2 2.0 c a b le len g th (m) 0 50 100 150 200 250 300 350 400 450
GS2993 dual output adaptive cable equalizer data sheet 53966 - 4 august 2012 15 of 23 propietary & confidential the carrier detect output pin (cd ) indicates the presence of a valid signal at the input of the GS2993. when cd is low, the device has detected a valid input on sdi and sdi . when cd is high, the device has not detected a valid input. the carrier detect output still functions when the GS2993 is in sleep mode, such that a valid serial digital input can be detected at all times. in the sleep state, the carrier detect functionality requires that the gain_sel input be set to 0. auto-sleep can be enabled by connecting cd to sleep. when co nnected, the GS2993 will automatically go into standby mode when there is a loss of serial digital input signal. note 1: cd will only detect loss of carrier for data rate s greater than 19mb/s. note 2: if the maximum cable length is exceeded (set by the sq_adj pin) and the device is not in bypass mode, the cd pin will not be driven low, even if a carrier is present. note 3: if the cd is connected to sleep, sq_adj should either be left open, or connected to ground. table 4-2: sleep input table sleep function 0 the GS2993 operates normally 1 the GS2993 enters sleep mode. cd output remains valid table 4-3: cd output table cd input status 0 valid input on sdi, sdi pins 1 input is not valid
GS2993 dual output adaptive cable equalizer data sheet 53966 - 4 august 2012 16 of 23 propietary & confidential 4.6 gain_sel the GS2993 has an option of co mpensating for 6db of flat attenuation in applications where there has been some type of attenuation prior to the equalizer. \ 4.7 adjustable output sw ing, de-emphasis and mute with the GS2993, the op1_ctl input pin determines the output swing and de-emphasis settings for the first output, with op2_ctl controlling the second output. the op1_ctl and op2_ctl pins are both analog inputs to allow different combinations of output swing, de-emphasis and mute . the possible values are listed in table 4-5 below: auto_mute can be enabled by connecting cd to op_ctl through external components, such that when cd is high (2.5v), op_ctl is fo rced high (3.3v) and when cd is low (0v), op_ctl is forced low (0v). the input level at which the part is muted can be set by the sq_adj pin through suitable voltage variances as described in section 4.4 . note: when sq_adj functionality is used and/or in auto_mute, the sleep pin should be left open. table 4-4: gain_sel input table gain_sel function 0 no flat band gain is applied 1 6db of flat attenuation will be compensated by the e q ualizer. table 4-5: op1_ctl and op2_ctl functions and levels level swing de-emphasis mute voltage 0 800mv off n 0 1 800mv 2db n 1 x (v cc_a )/8 2 800mv 4db n 2 x (v cc_a )/8 3 800mv 6db n 3 x (v cc_a )/8 4 400mv off n 4 x (v cc_a )/8 5 400mv 2db n 5 x (v cc_a )/8 6 400mv 4db n 6 x (v cc_a )/8 7 400mv 6db n 7 x (v cc_a )/8 8 400mv n/a y v cc_a
GS2993 dual output adaptive cable equalizer data sheet 53966 - 4 august 2012 17 of 23 propietary & confidential 4.8 cable length indicator (cli) the GS2993 has a cable length in dicator output. this is an analog voltage in the range of 0v to 3.3v, varying monotonically with input cable length. see figure 4-2 and table 4-6 below. figure 4-2: cable length indicator output note: the cli output voltage is referenced to v cc_a . 0. 6 0.8 1.0 1.2 1.4 1. 6 1.8 2.0 2.2 c li (v) 0 100 200 300 400 c a b le len g th (m) table 4-6: cable leng th indicator output cable length (m) 0 120 140 160 200 300 400 cli (v) 0.62 1.00 1.06 1.13 1.29 1.58 1.98
GS2993 dual output adaptive cable equalizer data sheet 53966 - 4 august 2012 18 of 23 propietary & confidential 5. application information 5.1 high gain adaptive cable equalizers the GS2993 is gennum's latest mu lti-rate adaptive cable equa lizer. in order to achieve industry-leading 3gb/s cable lengths, it is necessary to have high-gain in the equalizer. a video cable equalizer must provide wide band gain over a range of frequencies in order to accommodate the range of data rates and signal patterns that are present in a smpte compliant serial video stream. the GS2993 has an increase in gain over the gs2974a at critical hd and 3gb/s frequencies, and becaus e of this, the GS2993 may be sensitiv e to signals at the input that the gs2974a will not be sensitive to. small levels of signal or noise present at the input pins of the equalizer may cause chatter at the output. in order to prevent this from happening, particular attention must be paid to board layout. 5.2 pcb layout special attention must be paid to compon ent layout when desi gning serial digital interfaces for hdtv. an fr-4 dielectric can be used, however, controlled impedance transmission lines are required for pcb traces longer than approximately 1cm. note the following pcb artwork features used to optimize performance: ? pcb trace width for 3gb/s rate signals is closely matched to smt component width to minimize reflections due to change in trace impedance ? the pcb ground plane is removed under the GS2993 input components to minimize parasitic capacitance ? the pcb ground plane is removed under the GS2993 output components to minimize parasitic capacitance ? high-speed traces are curved to minimize impedance changes
GS2993 dual output adaptive cable equalizer data sheet 53966 - 4 august 2012 19 of 23 propietary & confidential 5.3 typical application circuit figure 5-1: GS2993 typical application circuit v cc _a 75 10nf 1f v cc _o1 1f 6 7 8 24 22 13 5 21 11 10 4 3 23 9 tab 2 1 6 15 12 10nf 17 470nf 20 gs 2993 14 37.4 75 1 19 10nf v cc _o2 18 4.7f 6 .2nh tab c d s leep c li op1_en op1_ c tl v cc _o1 s do1 s do1 vee_o1 vee_o2 s do2 s do2 v cc _o2 op2_ c tl op2_en s q_ad j bypa ss a gc a gc g ain_ s el s di s di vee_a v cc _a 4.7f 4.7f 4.7f
GS2993 dual output adaptive cable equalizer data sheet 53966 - 4 august 2012 20 of 23 propietary & confidential 6. package & ordering information 6.1 package dimensions 6.2 packaging data parameter value package type 4mm x 4mm 24-pin qfn package drawing reference jedec m0220 moisture sensitivity level 1 junction to case thermal resistance, j-c 31.0c/w junction to air thermal resistance, j-a (at zero airflow) 43.8c/w psi, 11.0c/w pb-free and rohs compliant yes
GS2993 dual output adaptive cable equalizer data sheet 53966 - 4 august 2012 21 of 23 propietary & confidential 6.3 recommended pcb footprint the center pad should be connected to the most negative power supply plane for analog circuitry in the device (vee_a) by a minimum of 5 vias. note: suggested dimensions only. final dimensio ns should conform to customer design rules and process optimizations. 6.4 marking diagram 0.25 0.55 2.76 3.70 2.76 3.70 note: all dimensions are in millimeters. 0.5 center pad GS2993 xxxxe3 yyww yyww - date code yy - 2-digit year ww - 2-digit week number xxxx - lot/work order id pin 1 id
GS2993 dual output adaptive cable equalizer data sheet 53966 - 4 august 2012 22 of 23 propietary & confidential 6.5 solder reflow profiles the GS2993 is available in a pb-free packag e. it is recommende d that the pb-free package be soldered with pb-free paste using the reflow profile shown in figure 6-1 . figure 6-1: maximum pb-free solder reflow profile 6.6 ordering information 25 c 150 c 200 c 217 c 2 6 0 c 250 c time temperature 8 min. max 6 0-180 se c . max 6 0-150 se c . 20-40 se c . 3 c /se c max 6 c /se c max part number package temperature range GS2993 GS2993-ine3 24-pin qfn -40c to 85c GS2993 GS2993-inte3 24-pin qfn tape & reel (250pcs) -40c to 85c GS2993 GS2993-inte3z 24-pin qfn tape & reel (2500pcs) -40c to 85c
? semtech 2012 all rights reserved. reproduction in whole or in part is pr ohibited without the prior writt en consent of the copyright owner. the information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. no liability will be accepted by the publisher for any consequence of its use. publication thereof does not convey nor imply any license under pa tent or other industrial or intellectual property rights. semtech assumes no responsibili ty or liability whatsoever for any failure or unexpected operation resulting from misuse, neglect improper installation, repair or improper handling or unusual physical or electrical stress including, but not limited to, exposure to parameters beyond the sp ecified maximum ratings or operation outside the specified range. semtech products are not designed, intended, authori zed or warranted to be suitable for use in life-support applications, devices or systems or other critical applicatio ns. inclusion of semtech products in such applications is understood to be undertaken solely at the customers own risk. should a customer purchase or use semtech products for any such unauthorized applic ation, the customer shall indemnify and hold semtech and its officers, employees, subs idiaries, affiliates, and distributors harmless against all claims, costs damages and atto rney fees which could arise. notice: all referenced brands, product names, service names and trademarks are the property of their respective owners . document identification data sheet information relating to this product and the application or design described herein is believed to be reliable, ho wever such information is provided as a guide only and semtech assumes no liability for any errors in this document, or for the application or design described herein. semtech reserves the right to make changes to the product or this document at any time without notice. GS2993 dual output adaptive cable equalizer data sheet 53966 - 4 august 2012 23 of 23 23 propietary & confidential contact information semtech corporation gennum products division 200 flynn road, camarillo, ca 93012 phone: (805) 498-2111, fax: (805) 498-3804 www.semtech.com caution electrostatic sensitive devices do not open packages or handle except at a static-free workstation

▲Up To Search▲

Price & Availability of GS2993

	To Download GS2993 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .